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-- Company: 
-- Engineer: 
-- 
-- Create Date:    13:22:10 02/06/2016 
-- Design Name: 
-- Module Name:    led_7seg_display - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity led_7seg_display is
	port (
		clk							: in  std_logic;
		init							: in  std_logic;
		display_hex					: in  std_logic_vector(3 downto 0);
		display_segments			: out std_logic_vector(7 downto 0)
	);
end led_7seg_display;


architecture Behavioral of led_7seg_display is

	signal display_segments_i				: std_logic_vector(7 downto 0) := "01000011"; -- (others => '0');

begin
	display_segments <= display_segments_i;
	
	segment_sel_proc : process (clk)
	begin
		if rising_edge(clk) then
			if (init = '1') then
				display_segments_i <= "00000110";
			else
				case display_hex is
					when x"0" =>
						display_segments_i <= "11000000";
					when x"1" =>
						display_segments_i <= "11111001";
					when x"2" =>
						display_segments_i <= "10100100";
					when x"3" =>
						display_segments_i <= "10110000";
					when x"4" =>
						display_segments_i <= "10011001";
					when x"5" =>
						display_segments_i <= "10010010";
					when x"6" =>
						display_segments_i <= "10000010";
					when x"7" =>
						display_segments_i <= "11111000";
					when x"8" =>
						display_segments_i <= "10000000";
					when x"9" =>
						display_segments_i <= "10010000";
					when x"A" =>
						display_segments_i <= "10001000";
					when x"B" =>
						display_segments_i <= "10000011";
					when x"C" =>
						display_segments_i <= "11000110";
					when x"D" =>
						display_segments_i <= "10100001";
					when x"E" =>
						display_segments_i <= "10000110";
					when others =>
						display_segments_i <= "10001110";
				end case;
			end if;
		end if;
	end process segment_sel_proc;

end Behavioral;

